Semiconductor Packaging

Semiverse and digital twin: Application of AR/VR in semiconductor fab address shortage of workforce
Metaverse

Semiverse and digital twin: Application of AR/VR in semiconductor fab address shortage of workforce

Semiconductor are vital components automating the man-made world. While semiconductors chips automating various human physical and computing tasks, they are fast-progressing to automate even the human-thinking by powering the AI systems. All the automation capabilities, the semi

20 min read
Samsung foundry supported by Cadence 3D IC EDA tool
Semiconductor Packaging

Samsung foundry supported by Cadence 3D IC EDA tool

Samsung semiconductor foundry customers can now use 3D IC design tool Integrity 3D-IC platform from Cadence for developing chips with multiple dies. Integrity 3D-IC platform supports Samsung’s new system description language called 3D CODE standard to achieve smooth flow and interoperability. Lates

3 min read
Chiplet-driven, More-than-Moore way creating exponential growth for semiconductor packaging
Semiconductor Market

Chiplet-driven, More-than-Moore way creating exponential growth for semiconductor packaging

While the monolithic semiconductor chips getting denser and denser with the Moore's law progressing towards 1 nm technology node, the cost of developing complete system on chip is alarmingly rising in the nodes of 3 nm and lower. It is estimated to cost around $ 750 million to design a monolithic

7 min read
Intel semiconductor tiles era: Chiplets to constitute 1-trillion transistors sys-in-pack
Semiconductor Market

Intel semiconductor tiles era: Chiplets to constitute 1-trillion transistors sys-in-pack

At the IEEE hotchips event, Intel's CEO Pat Gelsinger shared to the audience Intel's way of designing 1-trillion transistor integrated circuits on semiconductor for new era of fast-growing AI computing. It can go beyond personal computer and smart phone to Metaverse, blockchain/Bitcoin, edge comput

5 min read
Monolith 300mm photonics and RF-CMOS named GF Fotonix launched
Semiconductor Packaging

Monolith 300mm photonics and RF-CMOS named GF Fotonix launched

GF announces GF Fotonix, its next generation, widely disruptive silicon photonics platform. GF says it has active design wins with major customers, significant market share today and expects its growth in this segment to outpace the market. GlobalFoundries is collaborating with industry leaders

8 min read
TSMC, ASE, JCET and Amkor market shares reach 95% in Fan-Out market
Semiconductor Market

TSMC, ASE, JCET and Amkor market shares reach 95% in Fan-Out market

Yole forecasts a strong growth for the Fan-Out semiconductor chip packaging market, where it estimate the market to reach US$3,425 million by 2026, with 15.1% CAGR 2020- 2026. The revenues in 2026 for the main market segments are: US$1.613 million for mobile & consumer, US$1,597 million for telec

6 min read
Semiconductor foundry market roundup 2020
Business

Semiconductor foundry market roundup 2020

There are two type of chips, where density of transistors per square mm to impact, they are logic and traceiver block based system on chips, and pure semiconductor memory, and off-course there is a bit of each one in the other. Beyond 7 nm, the market driving higher density logic SoC ICs is basicall

7 min read
CoE by Applied and BE Semi to speed up development 3D fabrication of chiplets
Semiconductor Packaging

CoE by Applied and BE Semi to speed up development 3D fabrication of chiplets

To address the growing demand for semiconductor equipments to manufacture three-dimensional chips using heterogeneous materials, semiconductor equipment makers Applied Materials and BE Semiconductor have signed agreement to develop the industry’s first complete and proven equipment solution for

4 min read
Open-Silicon completed silicon validation of its HBM2 IP subsystem in TSMC's 16nm
Semiconductor Packaging

Open-Silicon completed silicon validation of its HBM2 IP subsystem in TSMC's 16nm

Open-Silicon said it has completed silicon validation of its High Bandwidth Memory (HBM2) IP subsystem in TSMC's 16nm FinFET technology in combination with TSMC's CoWoS 2.5D silicon interposer technology and HBM2 memory. Details shared by Open-Silicon in its release: This full IP subsystem sol

2 min read
India ESDM news update
Semiconductor Packaging

India ESDM news update

The Indian Electronics System Design and Manufacturing (ESDM) continues to grow but hardly matching to its full potential. The share of Indian semiconductor market is in single digit approximately around 6-8%, far less compared to the 10s of billions of $s worth of electronics sold here. The India

2 min read
UI in smart phones: new finger print sensor and Ultra sonic touch interface
Cellphone

UI in smart phones: new finger print sensor and Ultra sonic touch interface

The smartphone user interface still has a lot to improve with huge challenges to pack such interfaces in already compacted space. Smart phone developers are now seeing market-growth opportunity in interfacing fingerprint sensors in their phones. Synaptics has unveiled a new optical-based fingerprint

3 min read
Advanced semiconductor package litho growing 18.6%, 4x faster than IC lithography
Semiconductor Packaging

Advanced semiconductor package litho growing 18.6%, 4x faster than IC lithography

Semiconductor equipment market researcher Information Network finds advanced semiconductor package lithography growing 18.6%, 4x faster than IC lithography. Lithography tools are used for patterning Advanced Packages such as fan-out wafer level packaging (FO-WLP), fan-in wafer level chip scale p

3 min read
Silicon Bridge Podcast
SILICON BRIDGE

Our Editors dive into topical news, new products, and discuss the shifting architecture of the global semiconductor industry.

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