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EDA

IBM and Siemens Collaborate on Research to Advance Nanostack Architecture
AI

IBM and Siemens Collaborate on Research to Advance Nanostack Architecture

IBM and Siemens have announced research to advance IBM’s nanostack architecture, a transistor design the companies are working to prepare for manufacturing and production at scale. IBM demonstrated the viability of the architecture

3 min read
DVCon U.S. 2027 Names Jyotika Athavale Keynote on AV Silicon Functional Safety; Proposals Open to Nov. 1
EDA

DVCon U.S. 2027 Names Jyotika Athavale Keynote on AV Silicon Functional Safety; Proposals Open to Nov. 1

The 2027 Design and Verification Conference and Exhibition (DVCon U.S.), sponsored by Accellera Systems Initiative, has announced Jyotika Athavale, a leader in silicon functional safety at Waymo, as its invited keynote speaker. Panel proposals are being accepted through November 1, 2026. DVCon U.

4 min read
Keysight EDA software available to European chip startups via EuroCDP
EDA

Keysight EDA software available to European chip startups via EuroCDP

Keysight Technologies,  announced an agreement with the Chips Joint Undertaking (Chips JU) to make its electronic design automation (EDA) software and training available to semiconductor startups and small and medium-sized enterprises (SMEs) through the European Chips Design Platform (EuroCD

3 min read
VeriFast Launches AI-Powered VeriQuest Solution for Verification Challenges at DVCon India 2026
VLSI

VeriFast Launches AI-Powered VeriQuest Solution for Verification Challenges at DVCon India 2026

VeriFast introduced its new AI solution, VeriQuest, at DVCon India 2026. In a brief interaction with the Editor of EEHerald, Nishith Shukla, Head of Engineering at VeriFast, outlined the company’s offering and its plans to address key pain points faced by verification engineers. Veri

3 min read
Real Intent CEO Details Microarchitecture Analysis Breakthrough for Static Sign-Off at DVCon India 2026
VLSI

Real Intent CEO Details Microarchitecture Analysis Breakthrough for Static Sign-Off at DVCon India 2026

DVCon India 2026 opened with a keynote vision talk by Dr. Prakash Narain, President and CEO of Real Intent, focused on transforming static sign-off through microarchitectural analysis and artificial intelligence. Prakash defined static sign-off as a verification approach that relies on str

8 min read
Agnisys CEO Discusses AI Disruption and Golden Specification Focus at DVCon India 2026
VLSI

Agnisys CEO Discusses AI Disruption and Golden Specification Focus at DVCon India 2026

At DVCon India 2026, Anupam Bakshi, CEO of Agnisys, shared observations on the rapid rise of artificial intelligence in electronic design automation during a brief interaction with me. Agnisys has exhibited at the event and presenting its latest solutions for accelerating semiconductor developmen

5 min read
The Invisible Layer India's Semiconductor Buildout is Missing
Semiconductor Foundry

The Invisible Layer India's Semiconductor Buildout is Missing

Why lithography data preparation, process simulation, mask correction and metrology matter as much as the multi-million-dollar hardware, from research prototyping through to volume production

22 min read
Modelithics Qorvo GaN Library v26.5.11 Adds 200W QPD2562L GaN Model
EDA

Modelithics Qorvo GaN Library v26.5.11 Adds 200W QPD2562L GaN Model

Modelithics has released version 26.5.11 of its Modelithics Qorvo GaN Library. For more than 12 years, the library has given RF and microwave engineers up-to-date, highly accurate nonlinear models based on real-world measurements, helping speed up design cycles, impro

3 min read
Three Ex-Synopsys Engineers, One Trillion-Dollar Bet: Inside CaretEDA's Open Source, AI-Native Approach to Chip Design
EDA

Three Ex-Synopsys Engineers, One Trillion-Dollar Bet: Inside CaretEDA's Open Source, AI-Native Approach to Chip Design

Three former Synopsys colleagues have joined forces to launch CaretEDA, a startup betting that agentic AI and open source tools can make chip design faster, cheaper, and more accessible — without compromising the rigor the semiconductor industry demands. In a wide-ranging conversation with

10 min read
Vayavya Labs Announces General Availability of TVP Agentic AI for SystemC Modeling
EDA

Vayavya Labs Announces General Availability of TVP Agentic AI for SystemC Modeling

Vayavya Labs has announced the general availability of TVP (Tvastaa VP), an agentic AI system that automatically generates optimized SystemC models, test plans, and test vectors directly from design specifications. The system enables semiconductor and system companies to build software models to

2 min read
DVCon India 2026: Agentic Plenty — AI Moves Into the Roots, Stem, Flower and Fruit of the EDA Tree
EDA

DVCon India 2026: Agentic Plenty — AI Moves Into the Roots, Stem, Flower and Fruit of the EDA Tree

There was an invisible soul hovering over DVCon India 2026 visible in every keynote slide, every tutorial title, and every hallway conversation. That soul was agentic AI. From the three biggest names in EDA to the newest startups walking onto the stage for the first time, everyone at the Bengalur

8 min read
Lyptus Technologies acquires Aarohin Technologies to enhance ESL modeling
EDA

Lyptus Technologies acquires Aarohin Technologies to enhance ESL modeling

Bengaluru based Lyptus Technologies, a provider of semiconductor design and verification solutions, has announced the acquisition of Aarohin Technologies, a company focused on Electronic System Level (ESL) modeling and virtual prototyping. The move expands Lyptus Technologies’ capabilities

3 min read
Silicon Bridge Podcast
SILICON BRIDGE

Our Editors dive into topical news, new products, and discuss the shifting architecture of the global semiconductor industry.

▶ Podcast
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