Cadence announced at Computex 2026 the industry’s first fully autonomous virtual agentic AI design engineer, extending its ChipStack AI Super Agent framework to Level-5 autonomy. The solution is built on Cadence’s AI-driven electronic design automation (EDA) portfolio using NVIDIA Nemotron models and secured by the NVIDIA OpenShell runtime. It enables customers to run dynamic simulations in automated workflows.
At NVIDIA, thousands of engineers are using billions of compute hours per year to run millions of tests for design verification. Each engineer will use ChipStack agents to run hundreds of dynamic simulations with Cadence Xcelium Logic Simulation and Jasper Formal Verification. This approach delivers over 40X faster RTL validation cycles and reduces a typical five-week verification loop to less than a day.
“We see our customers using AI to let their expert engineers take on more ambitious silicon designs with greater speed and confidence,” said Paul Cunningham, senior vice president and general manager of the System Verification Group at Cadence. “With the ChipStack AI Super Agent, we’re taking the next step—moving from AI that assists engineers to autonomous virtual engineers that can implement real design and verification work, grounded in our signoff-accurate engines and running in secure, governed environments so teams can innovate faster with confidence.”
The ChipStack AI Super Agent at Level-5 autonomy independently executes complex chip design and verification workflows, including specification understanding, RTL generation, verification planning, formal analysis, simulation, debug, and design convergence. Engineers can inspect, guide, and collaborate as needed. It integrates natively with collaboration environments and tools such as Codex or Claude Code for transparency.
The agent behavior is grounded in Cadence’s physics-based design and verification engines for signoff-accurate results. It runs within the NVIDIA OpenShell runtime, a sandboxed environment that enforces governance and protects sensitive IP through policy controls, isolation, and managed access.
“As semiconductor designs grow more complex, engineering teams need AI agents that can accelerate verification without compromising security, control or trust,” said Timothy Costa, vice president and general manager of computational engineering at NVIDIA. “By securing Cadence's ChipStack AI Super Agent with NVIDIA OpenShell and powering it with Nemotron models, Cadence is bringing governed autonomy to chip design workflows — giving customers a faster, more secure path to develop and validate advanced semiconductors.”
Cadence acquired ChipStack in November 2025. It launched its first product in February 2026 and expanded into a portfolio of AI super agents at CadenceLIVE in April 2026, including ViraStack AI Super Agent for custom and analog design, InnoStack AI Super Agent for digital implementation and signoff, and Cadence AgentStack as the orchestration framework.
The Level-5 autonomous capabilities of the ChipStack AI Super Agent and the AgentStack orchestration framework are expected to be available to early-access customers in the second half of 2026.
