VLSI
Semiconductor Design Expert Satya Gupta Explains the Catalysts Driving the Indian Chip Design
Short Video Interview with Satya Gupta, President of VLSI Society of India, by Srinivasa Reddy N, Editor of EEHerald in the backdrop of the recently concluded event DVCON India 2025. Question: What progress do you see in the growth of Indian semiconductor design talent and the rise
6 min read
AI and Automation Transform Post-Silicon Testing: Expert Bytes from Soliton Technologies CEO at DVCon India
In an exclusive interview at DVCon India 2025, Arjun Sathiyaseelan, CEO of Soliton Technologies, addressed the evolving challenges of post-silicon testing as India's semiconductor industry shifts from services to product development. Sathiyaseelan highlighted the capital and talent demands for es
6 min read
Coverify’s Swadeshi EDA Tools Empower India’s MSMEs in Chip Design Revolution
Coverify’s Puneet Goel Unveils Indigenous EDA Solutions to Support India’s Chip Design SurgeAt DVCon India 2025, Puneet Goel, CTO and Founder of Coverify, shared a compelling vision for reducing chip design barriers for India’s Micro, Small, and Medium Enterprises (MSMEs) th
6 min read
Niche EDA Players like Real Intent Accelerate Chip Design
Real Intent’s Leaders Highlight the Critical Role of Niche EDA Players in India’s Semiconductor Surge At DVCon India 2025, Alok Mehrotra, Business Advisor to Real Intent, and Vikas Sachdeva, Head of Business, APAC at Real Intent, shared their insights on the pivotal role of nic
6 min read
Software-Driven Hardware Design: IBM’s Bhavesh Budhabhatti on Accelerating Computing
IBM India’s VLSI Team Drives Innovation in Software-Driven Hardware Design and Power11 Chip Development In an exclusive interview at DVCon India 2025, Bhavesh Budhabhatti, Director of Enterprise Systems Development at IBM’s India System Development Lab (ISDL) in Bangalore, shar
5 min read
Hyperscalers and Purpose-Built Chips: Insights from Siemens' Jean-Marie Brunet on Future Trends
Global Semiconductor Landscape: Siemens VP Jean-Marie Brunet Discusses Capacity Expansion, Custom Silicon Trends, and Verification Innovations.In a recent exclusive interview with EEHerald at the DVCon India 2025 conference in Bangalore, Jean-Marie Brunet, Vice President and General Manager o
6 min read
10th DVCON India 2025 Elevates as a Premier Hub for India’s Semiconductor VLSI Design Community
Irrespective of however advanced your chip design concept is, you require the best Electronic Design Automation (EDA) tools, Silicon -Proven IPs, and proven processes and systems to ensure performance and reliability. Events are evolved as best place to learn more about this. With India having 20
6 min read
Photonic Chip Breakthrough Enhances AI Convolution Efficiency with Light-Based Processing
A team of engineers has developed a photonic joint transform correlator (pJTC), a light-based computer chip designed to accelerate convolution operations critical to artificial intelligence (AI) tasks like image recognition and pattern-finding. The chip leverages near-energy-free on-chip Fourier
2 min read
SiFive Launches Second-Generation RISC-V IP for AI Workloads in Edge Computing and Data Centers
SiFive launched its 2nd gen Intelligence family by introducing five new RISC-V-based products designed to accelerate AI workloads across various applications. The lineup includes two new products, the X160 Gen 2 and X180 Gen 2, alongside upgraded versions of the X280 Gen 2, X390 Gen 2, and XM Gen
3 min read
Cadence Acquires Hexagon’s D&E Business to Enhance AI-Driven Multiphysics Simulation
Cadence announced a definitive agreement to acquire the Design & Engineering (D&E) business of Hexagon AB, including its MSC Software unit, for approximately €2.7 billion. The transaction, consisting of 70% cash and 30% Cadence common stock issued to Hexagon, aims to expand Cad
2 min read
Indigenous In-Memory Computing Chip Developed by BITS Pilani Under National Supercomputing Mission
The Birla Institute of Technology and Science (BITS) Pilani has developed India’s first indigenous In-Memory Computing Chip under the National Supercomputing Mission, an initiative by the Department of Science & Technology, Government of India. The proprietary chip design, for which a p
2 min read
10th DVCon India Set for 10-11th Sept 2025, Spotlighting AI and Analytics in Semiconductor Chip Design
The 10th edition of the Design and Verification Conference (DVCon) India is scheduled for September 10-11, 2025, at Radisson Blu, Marathahalli, Bangalore, India. The conference theme, “Architecture to Analytics – A2A,” focuses on the evolving semiconductor industry.Pradeep S
3 min read
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