The 10th edition of the Design and Verification Conference (DVCon) India is scheduled for September 10-11, 2025, at Radisson Blu, Marathahalli, Bangalore, India. The conference theme, “Architecture to Analytics – A2A,” focuses on the evolving semiconductor industry.
Pradeep Salla, General Chair of DVCon India 2025 from Siemens EDA, stated that the event will feature dedicated focus groups on System & IP Modeling, Architecture & Design, RISC-V, Analog & Mixed-Signal Verification, and Post-Silicon Validation to encourage dialogue and cross-industry collaboration in semiconductor design and verification.
The conference will include contributions from the India semiconductor design and verification community, fostering expertise and insights. Key sessions include:
Vision Talk: Jean-Marie Brunet, Siemens, on software-defined hardware design using AI and intelligent verification.
Vision Talk: Dr. Sam Appleton, Ausdia Inc, on solving the Secure Design Component (SDC) 'Root-of-Trust' problem.
Keynote: Dr. Ashish Darbari, Axiomise, on scaling formal verification for AI-driven compute.
Industry Panel: Moderated by Ashok Kumar Natarajan, Google, on the impact of 3D-IC on design, verification, and validation, with panelists Avinash Seegehalli (Quest Global), Brijesh Chandrala (Prodigy Techno), Harinagarjun Chippagi (TCS), and Biswajit Patra (Krutrim, Mirafra Partnership).
Industry Talk: Dr. Alok Jain, Cadence, on AI-driven EDA trends and technologies.
Keynote: Vikas Gautam, Synopsys, on re-engineering for AI chip design, verification, and optimization.
Industry Talk: On AI-driven design and verification for scaling complexity.
Industry Panel: Moderated by Ruchir Dixit, Siemens, on silicon strategy, tariffs, and India’s fabless and foundry future, with panelists Huzefa Cutlerywala (Tessolve), Souvik Basu (Qualcomm), and Anil Kempanna (Accenture).
Industry Talk: P R Sivakumar, Maven Silicon, on AI-powered chip design from specification to silicon.
DVCon India 2025 marks a decade of the conference, aiming to drive innovation in semiconductor design and verification.
