Silicon IP
JEDEC Publishes First Industry-Wide Silicon Photonics Reliability Standard
JEDEC Solid State Technology Association has released JESD264: Silicon Photonics Qualification and Reliability Requirements, the first industry-wide standard created to bring consistent qualification and reliability practices to silicon photonics devices. By setting a
3 min read
Wolfspeed expands premium power substrates in 200 mm silicon carbide portfolio
Wolfspeed, a global leader in silicon carbide (SiC) technology, announced today that its new Premium 200 mm n-type silicon carbide substrate is now commercially available, expanding its 200 mm SiC materials portfolio with a higher-quality starting material designed to
3 min read
VeriFast Launches AI-Powered VeriQuest Solution for Verification Challenges at DVCon India 2026
VeriFast introduced its new AI solution, VeriQuest, at DVCon India 2026. In a brief interaction with the Editor of EEHerald, Nishith Shukla, Head of Engineering at VeriFast, outlined the company’s offering and its plans to address key pain points faced by verification engineers. Veri
3 min read
Real Intent CEO Details Microarchitecture Analysis Breakthrough for Static Sign-Off at DVCon India 2026
DVCon India 2026 opened with a keynote vision talk by Dr. Prakash Narain, President and CEO of Real Intent, focused on transforming static sign-off through microarchitectural analysis and artificial intelligence. Prakash defined static sign-off as a verification approach that relies on str
8 min read
Agnisys CEO Discusses AI Disruption and Golden Specification Focus at DVCon India 2026
At DVCon India 2026, Anupam Bakshi, CEO of Agnisys, shared observations on the rapid rise of artificial intelligence in electronic design automation during a brief interaction with me. Agnisys has exhibited at the event and presenting its latest solutions for accelerating semiconductor developmen
5 min read
QuickLogic enhanced eFPGA Hard IP for GlobalFoundries 12LP includes DSP MAC and health monitor
QuickLogic has released an enhanced eFPGA Hard IP that builds on its silicon-proven technology for GlobalFoundries 12LP. The release includes improved performance and area efficiency, scales beyond 250K LUTs, and adds enhanced DSP and optional configuration bit health monitoring. Key new f
3 min read
Vayavya Labs Announces General Availability of TVP Agentic AI for SystemC Modeling
Vayavya Labs has announced the general availability of TVP (Tvastaa VP), an agentic AI system that automatically generates optimized SystemC models, test plans, and test vectors directly from design specifications. The system enables semiconductor and system companies to build software models to
2 min read
DVCon India 2026: Agentic Plenty — AI Moves Into the Roots, Stem, Flower and Fruit of the EDA Tree
There was an invisible soul hovering over DVCon India 2026 visible in every keynote slide, every tutorial title, and every hallway conversation. That soul was agentic AI. From the three biggest names in EDA to the newest startups walking onto the stage for the first time, everyone at the Bengalur
8 min read
MIPS Becomes RISC-V International Premier Member and Appoints CTO as Board Vice Chairman for Physical AI Platforms
MIPS, by GF, today announced it is now a Premier Member of RISC-V International, with Yankin Tanurhan, SVP & CTO of MIPS, by GF, appointed as Vice Chairman of the RISC-V International Board. The milestone advances GF and MIPS leadership in the open standards and semiconductor technologies req
5 min read
Macnica Launches Prophet AI, Japan's First AI-Powered Next-Generation SOC Platform
Macnica announced that it has entered into an agency agreement with California based Prophet Security and will begin offering the Prophet Agentic AI SOC Platform, referred to as Prophet AI. The company described it as the first AI-powered next-generation SOC platform in Japan. Companies fa
6 min read
DVCon India 2026 Scheduled for September 1-3 in Bengaluru with Focus on AI-Driven Design and Verification Methodologies
DVCon India 2026 will take place from September 1-3, 2026, at Radisson Blu in Marathahalli, Bengaluru. The conference addresses the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. EEHerald is the offi
7 min read
Arteris Deepens Partnership with Arm to Strengthen Chip-Level Security Verification
Arteris, a semiconductor technology provider, has expanded its partnership with Arm to broaden the use of Arteris hardware security assurance tools across Arm's CPU core designs, building on five years of collaboration between the two companies. The expansion centers on Cycuity Radix, an A
2 min read
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