VeriFast introduced its new AI solution, VeriQuest, at DVCon India 2026. In a brief interaction with the Editor of EEHerald, Nishith Shukla, Head of Engineering at VeriFast, outlined the company’s offering and its plans to address key pain points faced by verification engineers.
VeriFast brings more than 12 years of experience in the semiconductor industry. While its primary strength is verification, the company also works in physical design and system software.
VeriQuest focuses on major verification challenges and currently provides three specialized agents:
- The Root Cause Analysis Agent examines regression results and helps design and verification engineers pinpoint the root cause of issues identified in the RTL design.
- The Coverage Closer Agent detects coverage gaps and recommends how to close them. Unlike conventional EDA tools that only report missing coverage, this agent explains why coverage is missing and suggests practical steps for engineers to achieve it.
- The Assertion Development Agent tackles one of the significant difficulties for verification engineers. It accepts a design specification as input, generates an assertion plan, and produces a ready-to-use assertion file that can be applied directly in simulation.
Shukla stated that the three agents are available now. Several pilot projects are already in progress, and the solution has been released publicly for evaluation.
The agents are designed for semiconductor verification workloads, covering both SoC and IP verification, and are intended for use in the post-simulation stage.
Looking ahead, VeriFast has outlined a multi-phase roadmap. The current launch represents Phase 1. In subsequent phases the company plans to introduce an additional 15 or 16 agents that will extend coverage across the flow from design to sign-off. Physical-design applications are not yet included but form part of the longer-term plans.
VeriQuest was launched the day before the interview at DVCon India 2026.
Nishith Shukla brings more than 20 years of expertise in SoC verification and complex ASIC/FPGA design and verification projects. As Head of Engineering at VeriFast, he oversees the company’s technical direction.
The introduction of VeriQuest positions VeriFast’s agentic tools as practical aids for reducing the manual effort involved in root-cause analysis, coverage closure, and assertion development within contemporary verification flows.
Watch the full video of interaction
