JEDEC Solid State Technology Association announced publication of JESD406-5D, the updated LPDDR5/5X Serial Presence Detect (SPD) Contents standard. The new revision adds support for calculating recovery time when switching operating modes. JESD406-5D is available for free download from the JEDEC website.
LPDDR5/5X memory devices support two sets of timing parameters: a full speed mode and a reduced speed mode that consumes less power. This capability enables longer battery life in mobile devices, a primary application for LPDDR5/5X chips and modules, and is increasingly relevant for data centers as adoption of these devices grows.
The updated standard documents key parameters for calculating the switching time between fast and low power modes. This makes the mode-switching feature more efficient and supports higher system performance.
Bill Gervasi, Chair of the JEDEC SPD Task Group, stated that reducing power consumption has become imperative for computing systems amid the acceleration of AI and other demanding applications. He noted that the updates to the JESD406-5 standard serve as an important enabler for systems to optimize performance while maintaining a lower power profile.
