QuickLogic Corporation, a developer of embedded FPGA (eFPGA) Hard IP, user tools, and ruggedized discrete FPGAs, announced a mid-6-figure contract to implement architectural enhancements for its eFPGA Hard IP in a new customer ASIC using Intel 18A technology. The enhancements, developed under contract in 2025, reduce power consumption, increase performance, and decrease the silicon area (PPA) required for high-density eFPGA cores. These improvements are extensible to all advanced fabrication nodes.
Andy Jaros, VP of IP Sales at QuickLogic, stated that the company works closely with lead customers to implement essential improvements. With the PPA enhancements, QuickLogic is positioned to address requirements for very high-density eFPGA cores in ASICs and SoCs, as well as large discrete FPGA needs. The advancements also improve the ability to serve cost-sensitive applications, broadening market scope and use cases.
QuickLogic offers customized eFPGA solutions, including commercial, ruggedized, and radiation-hardened versions.
