The Ministry of Electronics and Information Technology’s Chips to Startup (C2S) Programme has issued a final call for submissions to the Digital India RISC-V (DIR-V) Grand Challenge, with the deadline fast approaching on May 10, 2025. (As per the latest information the last date is extended to 15th May 2025). This initiative invites students, researchers, and innovators to design and develop cutting-edge, cost-effective solutions using India’s indigenous System-on-Chips (SoCs) powered by VEGA and SHAKTI processors.
Why Participate?
The DIR-V Grand Challenge offers a unique opportunity to contribute to India’s technological self-reliance while gaining access to world-class resources and support. Participants can:
Utilize Artix-7 100T FPGA development boards from Xilinx.
Access SoCs based on VEGA and SHAKTI processors.
Receive technical support from leading institutions like the Indian Institute of Technology, Madras, and CDAC India.
Benefit from incubation support through Maker Village.
Gain internship and mentorship opportunities with industry giants such as Renesas Electronics, L&T Semiconductor Technologies, and Bharat Electronics Limited.
Compete for ₹60 lakh in total prize money and ₹90 lakh in Proof-of-Concept (PoC) development funding.
Driving the RISC-V Revolution
The challenge underscores India’s commitment to advancing open-source RISC-V architecture, positioning the nation as a global leader in semiconductor innovation. By leveraging VEGA and SHAKTI processors, participants can create impactful, scalable solutions tailored to modern technological demands, from AI to IoT and beyond.
How to Join
Don’t miss this chance to be part of India’s tech revolution! Register now at https://c2s.gov.in/Grand_Challenge.jsp and submit your innovative ideas by May 10, 2025 (As per the latest information the last date is extended to 15th May 2025).
Updated on 11th May 2025 with small change
