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Advanced Semiconductor

Qnity enhances AI-driven advanced packaging with end-to-end process solutions

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Qnity Electronics has introduced a scalable materials platform that combines metallization, bumping, dielectric, and fine-line patterning technologies, aimed at enabling next-generation high-density and 3D integrated semiconductor systems. The platform is positioned to support AI-driven advanced packaging, where finer interconnects, higher component density, and better manufacturing yields largely determine whether a chip design can actually scale successfully.

Chuck Xu, president of Interconnect Solutions at Qnity, said customers are increasingly looking for system-level solutions, an area he described as where Qnity excels. He said that as AI, chiplets, high-bandwidth memory, 3D stacking, and heterogeneous integration, meaning combining different types of chips manufactured with different processes, drive a shift away from flat two-dimensional chip designs toward more complex vertical architectures, semiconductor manufacturers face new levels of integration complexity, creating demand for combined solutions spanning both advanced packaging and thermal management. He said Qnity's teams act as a design partner offering end-to-end process development and engineering capabilities that help customers manage complexity at the layer-to-layer and chip-to-chip level, allowing them to scale new designs with more confidence.

Advanced packaging platforms such as Chip-on-Wafer-on-Substrate (CoWoS), Embedded Multi-die Interconnect Bridge (EMIB), and high-bandwidth memory (HBM) all require precise control over plating height, meaning how thick a deposited metal layer is, and strong coplanarity, meaning how evenly aligned different surfaces are with each other. Qnity's integrated portfolio supports tin-silver (SnAg) micro-bumps, copper-to-copper direct and hybrid bonding, and high-resolution dielectric and patterning processes, enabling metal wiring with line and space widths as fine as 2 microns, while maintaining tight control over critical dimensions (the precise sizes of manufactured features) and low defect rates.

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Qnity plans to detail the platform in a presentation by Jason Chuang, packaging polymer segment director for Advanced Circuit & Packaging, at the Heterogeneous Integration Global Summit during SEMICON Taiwan 2026 on September 1. Attendees are invited to meet with Qnity representatives to discuss trends shaping the future of advanced semiconductor packaging.

 
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EEHerald News Desk

Editor, Electronics Engineering Herald


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