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Synaptics Launches Astra SR200 xMCUs for Multimodal Edge AI

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Synaptics Incorporated has launched the Astra SR200 Series, xMCUs for multimodal Edge AI in wearables, sensing devices, connected cameras and industrial systems, with performance up to 400 GOPS.

The company describes the xMCU as a new class of microcontroller. Unlike conventional MCUs constrained by limited on-chip memory and compute, the SR200 combines heterogeneous AI-native compute and acceleration with integrated custom DRAM that scales to hundreds of megabytes, allowing larger AI models and multimodal workloads to run on-device.

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Synaptics Launches Astra SR200 xMCUs for Multimodal Edge AI

The series has three pin-compatible product lines with a common hardware foundation and shared SDK. The SR210 delivers 200 GOPS for power-optimized, always-on voice and sensing; the SR230 adds vision, display and optional audio at 300 GOPS; and the SR250 provides 400 GOPS with dual vision and display paths. Synaptics says developers can scale performance while preserving software investment and system architecture.

The memory architecture pairs up to 8MB of SRAM with extensible, high-bandwidth custom DRAM that scales to hundreds of megabytes. Synaptics says the design is built around Edge AI latency, retention and power demands, runs workloads at one-third the power of typical system DRAM, and eliminates the need for costly external memory in most applications.

The Synaptics Torq AI engine integrates the Coral NPU from Google Research for deep learning workloads, including CNN, transformer and fully connected networks. Its open-source MLIR/IREE compiler supports industry-standard frameworks and model formats. A high-performance core scales to 800MHz, while an efficiency core handles always-on sensor fusion, connectivity and low-power inference; an optional Cadence Tensilica HiFi 5 DSP adds audio and acoustic ML processing.

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Key features of the SR200 Series include silicon-rooted security with hardware isolation, cryptographic acceleration, anti-tamper detection, device lifecycle management and secure boot; integrated vision and audio capabilities; an ultra-low-power architecture with tiered domains; and an open-source software ecosystem. The security implementation targets PSA Level 3 and CC EAL4+ certification.

The peripheral and connectivity set includes high-speed octal SPI, SDIO and eMMC storage interfaces, UART, SPI, I2C, I3C, PWM, USB 2.0 and low-power GPIO. Industrial variants add 1Gb Ethernet with IEEE 1588 TSN support and two CAN-FD interfaces.

Vikram Gupta, SVP and GM of Synaptics’ Edge Compute & Connectivity Division, said the SR200 brings “applications-processor capability into the MCU domain,” running multimodal AI workloads that traditionally require Linux and discrete DRAM. The series supports Zephyr RTOS and the open-source Torq NPU compiler.

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EEHerald News Desk

Editor, Electronics Engineering Herald


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