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Marvell Unveils Structera X 3406 and 3506 CXL 3.2 Memory Expanders for AI Inference

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Marvell Technology, Inc. has announced the second-generation Marvell Structera X 3406 and Marvell Structera X 3506 CXL 3.2 memory expanders for AI inference, with six DDR4/DDR5 channels and PCIe Gen 6 connectivity. The controllers are designed to help cloud, enterprise and AI infrastructure providers build scalable systems.

Marvell says growing LLM sizes, expanding context windows and increasing KV-cache requirements are driving memory demand that traditional server architectures cannot meet. It describes modern AI inference workloads, including LLM serving and deep learning recommendation models (DLRM), as memory bound, with KV-cache capacity affecting time to first token (TTFT), throughput and XPU utilization.

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Marvell Unveils Structera X 3406 and 3506 CXL 3.2 Memory Expanders for AI Inference

The six memory channels provide 50% more channels than the previous generation. Structera X 3406 supports up to 18 DDR4 RDIMM slots and 9TB of DDR4 memory per controller, while Structera X 3506 supports up to 12 DDR5 RDIMM slots and 6TB of DDR5 memory. The controllers support memory sharing with up to four hosts and up to 256GB/s of PCIe6.0 x16 host bandwidth.

Key features include inline LZ4 compression with up to 250GB/s compression/decompression throughput and up to 2–3x more effective memory capacity, depending on workloads; StructGuard enterprise-grade RAS with error correction to address DRAM device failures; and post-quantum cryptography, Caliptra 2.0, CXL IDE and AES-256 memory encryption.

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For DLRM workloads, Marvell says Structera X delivers up to 2x higher queries per second and 2–3x more effective embedding-table capacity per controller. For LLM serving, it reports up to 40–50% faster TTFT at equivalent context length, or up to 2x longer supportable context windows at equivalent latency compared with the previous generation.

The Structera X 3406 and 3506 are expected to sample in Q1 2027. Marvell will demonstrate the controllers at the 2026 OCP Global Summit, October 12-15 in San Jose, California, at Booth #B31.

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EEHerald News Desk

Editor, Electronics Engineering Herald


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