Toshiba Electronic Devices & Storage Corporation has developed a technology for trench-gate silicon carbide (SiC) MOSFETs that reduces on-resistance while improving short-circuit robustness. The technology optimizes the bottom p-well structure formed under the trench and the design of the junction field-effect transistor (JFET) region, including its width (WJFET) and doping concentration (NJFET). It suppresses short-circuit energy generated inside the device and reduces temperature rises, while maintaining gate oxide reliability.
Trench-gate SiC MOSFETs are used in power conversion applications such as electric vehicles, renewable energy systems, and data center power supplies. The new design addresses the trade-off between low on-resistance and short-circuit robustness by clarifying the relationship between short-circuit energy and device degradation.
In prototype devices, Toshiba confirmed an approximately 25% reduction in on-resistance compared with conventional trench-gate SiC MOSFETs while maintaining short-circuit robustness.
Test samples of a 1200V trench-gate SiC MOSFET incorporating part of this technology, “TW007D120E,” have been shipping since earlier this month.
Toshiba will present details of this technology at the 38th International Symposium on Power Semiconductor Devices and ICs (ISPSD) 2026, held in Las Vegas from May 24 to 28, 2026.
The work was supported by the New Energy and Industrial Technology Development Organization (NEDO) under project JPNP21029.
