Zero ASIC Announces Profitable 2025 Close as CEO Outlines Plans for 24-Hour Chip Design and Build Cycles

Zero ASIC CEO Andreas Olofsson announced on LinkedIn that the company will close out 2025 profitable, stating: "I'm happy to tell you that we are going to close out the year profitable! Not many semiconductor startups in history can make that claim!"

In a blog article titled "Join the Chip Design Revolution," Olofsson wrote that chip design has, over the past 15 years, required thousands of specialists and up to $1 billion in funding per project. The company, founded in 2020, has been working to address this barrier.

Pic: Andreas Olofsson with his team
Source: Zero ASIC

Zero ASIC stated it is entering a major growth phase and, if plans proceed as intended, will deliver the following over the next few years:

24-hour deterministic RTL-to-GDS compilation cycles  
24-hour System-in-Package (SiP) device build-and-ship cycles  
A portfolio of off-the-shelf, high-performance chiplets  
A composable, chiplet-based open-standard FPGA  
Real-time silicon system digital twin emulation  

The company described itself as the only semiconductor firm where every engineer is required to contribute to open-source projects and invited individuals with relevant skills to consider joining the team. 
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