Siemens Digital Industries Software announced an expanded collaboration with Samsung Foundry, focusing on certifications for Samsung’s advanced process technologies and new joint solutions. Siemens’ EDA portfolio, including Calibre, Solido, and Aprisa software, is now certified for Samsung’s FinFET and MBCFET processes from 14nm to 2nm nodes (SF2/SF2P), as well as fully depleted-silicon on insulator (FD-SOI) processes including 18FDS and above.
The Calibre nmPlatform supports IC verification signoff, while Calibre DesignEnhancer automates layout optimization. The Solido Simulation Suite, including Solido SPICE, Analog FastSPICE, and LibSPICE, verifies analog, RF, and 3D-IC designs, supporting the Open Model Interface for aging and reliability analysis across Samsung’s 14nm to 2nm processes. Aprisa handles digital implementation, supporting Samsung’s design rules.
Siemens and Samsung developed joint solutions addressing semiconductor challenges. For silicon photonics, Siemens’ Calibre equation-based DRC and Auto-Waivers software filter false violations in curved segments. An automated layout modification solution using Calibre DesignEnhancer addresses EM/IR hotspots with features like DE Via, DE Pge, and DE Pvr for DRC compliance. Siemens’ Tessent DFT tools, including Tessent Diagnosis and Hi-Res Chain, work with Samsung to enhance defect screening and diagnosis for advanced processes.
For multi-die designs, Siemens’ Innovator3D IC and Calibre 3DSTACK solutions align with Samsung’s heterogeneous integration, verifying inter-chip antenna effects, ESD, and parasitic extraction for TSV and interposer-based 2.5D/3D designs. The companies also use SVDB from LVS runs and SPICE models to calculate device variations based on local layout effects, identifying issues in standard cells and analog designs across 14nm to 2nm nodes.
New reference flows for mutual customers include Solido Simulation Suite for analog and standard-cell verification, Solido Design Environment for variation-aware verification, Solido Characterization Suite for .lib production and verification, and Solido IP Validation Suite for IP quality assurance. Sungjae Lee, vice president at Samsung Electronics, noted the collaboration supports Samsung’s advanced processes. Juan C. Rey, senior vice president at Siemens, stated the partnership advances 3D-IC architectures and design strategies
