VLSI

DVCon U.S. 2026 opens call for extended abstracts, workshops, and tutorials

The Design and Verification Conference and Exhibition United States (DVCon U.S.) 2026, sponsored by Accellera Systems Initiative, has announced its call for extended abstracts, workshop, and tutorial proposals. The event is scheduled for March 2-5, 2026, at the Hyatt Regency Hotel in Santa Clara, California.
Extended abstracts are invited from engineers, researchers, and practitioners, focusing on technical insights, case studies, and approaches in design and verification. Submissions should be 600 to 1,200 words and cover topics such as functional verification, safety-critical design, low-power techniques, machine learning applications, design and verification automation, and mixed-signal design. Other suggested areas include EDA tool usage, FPGA-based design, verification languages like SVA or PSL, scripting, Portable Stimulus, AMS techniques, and IoT methodologies.
The conference also seeks proposals for 90-minute sponsored short workshops and three-hour technical tutorials, both included with full conference registration. Workshops, scheduled for Monday and Thursday, can be hands-on or lecture-based, while tutorials focus on continuing education. Suggested topics include SystemVerilog, SystemC, software-driven SoC verification, assertion-based verification, coverage-driven techniques, low-power strategies, mixed-signal modeling, secure IP design, transaction-level ...

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