The 2027 Design and Verification Conference and Exhibition (DVCon U.S.), sponsored by Accellera Systems Initiative, has announced Jyotika Athavale, a leader in silicon functional safety at Waymo, as its invited keynote speaker. Panel proposals are being accepted through November 1, 2026. DVCon U.S. 2027 is scheduled for March 1–4 at the Hyatt Regency Santa Clara in Santa Clara, California.
Athavale is currently scheduled to present her keynote, “Safe by Design: Transforming AV Silicon Integration,” on Wednesday, March 3, 2027, at 1:00 p.m. Program details are subject to change.
The keynote abstract states that the compute demands of next-generation high-performance computing (HPC) and artificial intelligence (AI) accelerators are driving unprecedented integration, pushing ASIC architectures to complexity levels previously unseen in mission-critical, ultra-large-scale applications. Ensuring functional safety and hardware dependability at this scale presents a challenge for silicon architects and safety engineers because traditional, localized methodologies for safety analysis, fault injection, and FMEDA can no longer keep pace with heterogeneous, multi-billion transistor designs. The industry is hitting a “complexity wall,” exacerbated by fragmented data formats across disparate EDA toolchains and IP blocks.
The keynote will address how the high-performance silicon ecosystem can scale silicon-level functional safety and hardware dependability through standardized interoperability and advanced on-chip safety mechanisms. It will explore key features essential for building verifiably robust silicon, including In-System Test (IST) for periodic hardware health checks, Software Diagnostic Libraries (SDL) to augment hardware self-testing capabilities, and comprehensive Silicon Lifecycle Management (SLM) to monitor and predict device behavior from manufacturing to end-of-life. These mechanisms, when coupled with a unified data exchange format, are described as critical for robust fault detection, mitigation, and proving safety and reliability intent.
Xiaolin Chen, DVCon U.S. 2027 General Chair, stated: “We are thrilled to welcome Jyotika as the invited keynote speaker for DVCon U.S. 2027. Her extensive experience in functional safety, hardware reliability, and advanced silicon technologies gives her a unique perspective on one of the industry’s most pressing challenges. As increasingly complex silicon becomes central to autonomous and other mission-critical systems, her insights into scalable safety methodologies, interoperability, and lifecycle management will be especially valuable to the DVCon U.S. community.”
Jyotika Athavale has a career spanning organizations in the semiconductor and autonomous vehicle industries, including Waymo, NVIDIA, Intel, and Synopsys. She has held key leadership roles within the IEEE as President Emeritus of the IEEE Computer Society and Chair of IEEE P2851 Standards. Her work involves the intersection of high-performance heterogeneous computing and automotive safety standards, and she continues work related to “Safety-by-Design.”
DVCon U.S. 2027 is inviting proposals for a one-hour panel discussion on Wednesday, March 3, 2027. Proposals should emphasize audience engagement and the exchange of ideas rather than formal paper presentations, and should bring together practical experience with perspectives on emerging technologies, industry trends, and future challenges. The panel is intended to be lively, thought-provoking, and relevant to the hardware design and verification community. Submission guidelines are available on the panel submission page of the DVCon U.S. website.
The technical program is still being finalized. Updates are available on the DVCon U.S. 2027 website.
