Altera Enhances FPGA Portfolio with Agilex Updates and AI-Optimized Visual Designer Studio

Altera announced updates to its Agilex FPGA portfolio and introduced new software tools at its Innovators Day developer conference, aimed at addressing the needs of FPGA developers in markets such as industrial, vision, defense, aerospace, communications, and data centers. The announcements focus on expanding the accessibility and scalability of programmable logic for AI-driven applications.

Altera confirmed production availability for all Agilex FPGA device families, including Agilex 5 and Agilex 3 SoC FPGAs, which incorporate an integrated ARM processor subsystem. These devices are designed for edge AI and hardware-software co-processing, offering deterministic low-latency performance, system integration, and power efficiency.

For applications requiring higher capacity, such as edge AI inference, 4K/8K video, and 5G/6G wireless, Altera increased the logic density of its Agilex 5 D-Series FPGAs and SoCs by up to 2.5X, reaching up to 1.6 million logic elements in a single device. The D-Series also features higher DSP block ratios and enhanced memory bandwidth, with DDR5 interface speeds increased to 5,600 MT/s and LPDDR5 to 5,500 MT/s, a 25% improvement over prior specifications. All Agilex 5 D-Series devices include post-quantum cryptography (PQC) secure boot capability. Developers can begin designing with select Agilex 5 D-Series devices using Quartus Prime S...