AMD new Spartan UltraScale+ FPGA consume 30% less power than its previous generation
Date: 14/03/2024
AMD expands its lineup of Cost-Optimized FPGAs and adaptive SoCs with the introduction of the Spartan UltraScale+ FPGA family. Engineered for cost efficiency and power-effective performance, these FPGAs cater to a broad spectrum of I/O-intensive applications at the edge. The Spartan UltraScale+ devices boast up to 30 percent lower total power consumption compared to their predecessors, coupled with a robust set of security features within the AMD Cost-Optimized Portfolio.
Flexible I/O Interfacing: Designed for edge applications, Spartan UltraScale+ FPGAs offer high I/O counts and flexible interfaces to seamlessly integrate with various devices or systems. They provide the industry's highest I/O to logic cell ratio on 28nm and below process technology, supporting up to 572 I/Os and voltage up to 3.3V for versatile connectivity.
Power-Efficient Compute: Built on proven 16nm fabric, these FPGAs deliver power-efficient performance. They feature support for a wide array of packaging options, starting from a compact 10x10mm footprint, ensuring high I/O density in ultra-compact form factors. Additionally, the Spartan UltraScale+ family offers scalability from cost-optimized to high-end products.
Robust Security: Equipped with advanced security features, Spartan UltraScale+ FPGAs safeguard IP and prevent tampering. They support Post-Quantum Cryptography with NIST-approved algorithms, feature a unique physical unclonable function for each device, and include mechanisms to manage security keys and protect against side-channel attacks and tampering.
The Spartan UltraScale+ FPGA family from AMD combines power-efficient performance with cutting-edge security features, making it an ideal choice for edge computing applications. With its high I/O density, scalability, and robust security measures. Supported by the AMD Vivado Design Suite and Vitis Unified Software Platform, the Spartan UltraScale+ FPGAs offer a comprehensive design and development ecosystem for edge computing solutions.
“For over 25 years the Spartan FPGA family has helped power some of humanity’s finest achievements, from lifesaving automated defibrillators to the CERN particle accelerator advancing the boundaries of human knowledge,” said Kirk Saban, corporate vice president, Adaptive and Embedded Computing Group, AMD. “Building on proven 16nm technology, the Spartan UltraScale+ family’s enhanced security and features, common design tools, and long product lifecycles further strengthen our market-leading FPGA portfolio and underscore our commitment to delivering cost-optimized products for customers.”
Availability:
Sampling and evaluation kits for the AMD Spartan UltraScale+ FPGA family are expected in the first half of 2025, with documentation available now and tool support starting with the AMD Vivado Design Suite in the fourth quarter of 2024.
