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Compliance analyzers for DDR4, DDR3 and DDR3L DRAM interface specs

Date: 22/10/2013
Tektronix' partner Nexus Technology has developed MCA4000 protocol compliance and bus protocol analyzer for faster protocol, performance and compliance analysis of JEDEC DDR4, DDR3 and DDR3L DRAM memory interface standards.

The MCA4000 memory compliance analyzer features a dual architecture to detect protocol violations coupled with the ability to acquire and analyze violations and determine bus performance. The MCA4000 has an integrated protocol analyzer that monitors a DDR memory bus at-speed, reporting statistical results on events and violations in real-time. It also has an integrated, full function logic analyzer with 1G cycle acquisition depth.

MCA4000 features programmable front-end which can generate oscilloscope-like eye diagrams to graphically illustrate DDR PHY settings, bus integrity and required sample points.