IBM Announces World's First Sub-1nm Chip Technology with Nanostack Architecture

IBM has unveiled the world's first sub-1 nanometer chip technology, featuring a transistor architecture at 0.7 nanometers  or 7 angstroms, a scale approaching the size of individual atoms. The technology is built around a new "nanostack" 3D architecture developed through advances in thin dielectric wafer bonding, SRAM scaling, and channel material innovation. Published technical results report the chip offers up to 50 percent more performance, or 70 percent greater energy efficiency than IBM's 2nm node chips, with applications spanning generative AI, cloud infrastructure, and next-generation electronic devices. 

In a chip the size of a fingernail, the design packs nearly 100 billion transistors  nearly twice the density of IBM's 2nm chip unveiled in 2021. 
IBM researchers project that an AI accelerator built on this technology could deliver around 9,000 TOPS, compared with roughly 1,500 TOPS for current popular AI accelerators, potentially cutting frontier LLM training times from around three months to a couple of weeks.

Architecture: Nanostack represents a major advance beyond nanosheet technology  the industry's current leading-edge architecture, invented by IBM. Where nanos...