Navitas Semiconductor announced the launch of its 5th-generation GeneSiC technology platform. The platform introduces High Voltage SiC Trench-Assisted Planar (TAP) MOSFET technology for a 1200V line of MOSFETs. This complements the company's ultra-high voltage 2300V and 3300V technologies from the 4th-generation GeneSiC platform. The technology targets applications in AI data centers, grid and energy infrastructure, and industrial electrification.
The 5th-generation platform uses a compact TAP architecture that combines a planar gate structure with a trench structure in the source region. This design aims to provide efficiency and lifetime reliability in high-voltage power electronics.
Performance improvements include a 35% better RDS,ON × QGD figure of merit compared to the previous generation 1200V technology, which reduces switching losses for cooler operation and higher frequency capabilities.
The platform shows a ~25% improvement in the QGD / QGS ratio. It features a stable high threshold voltage (VGS,TH ≥ 3V) to prevent parasitic turn-on in high-noise environments.
Dynamic performance is addressed through optimization of the RDS(ON) × EOSS characteristic and integration of "Soft Body-Diode" technology to reduce electromagnetic interference (EMI) and support smoother commutation in high-speed switching.
The technology has achieved AEC-Plus grade qualification, which exceeds AEC-Q101 and JEDEC standards based on Navitas test results. Reliability features include:
- Extended stress testing: 3x longer duration for static high-temperature, high-voltage tests (HTRB, HTGB, and HTGB-R).
- Advanced switching reliability testing: Dynamic reverse bias (DRB) and dynamic gate switching (DGS) aligned with fast-switching application profiles.
- Industry-leading stability: Lowest VGS,TH shift over extended switching stress periods.
- Extreme gate oxide reliability: Extrapolated failure time exceeding 1 million years at operating VGS of 18V and 175°C.
- Enhanced cosmic ray resilience: Low FIT rates for high-altitude and high-uptime environments.
Paul Wheeler, VP & GM of Navitas’ SiC Business Unit, stated that the improvements in the 5th-generation GeneSiC technology support performance and reliability in silicon carbide MOSFETs for customer applications in AI data centers and energy infrastructure.
A white paper on Trench-Assisted Planar technology is available for download from the Navitas website.
Navitas plans to announce new products based on this 5th-generation platform in the coming months.
