Production-Ready Flows and Certified IP Strengthen Samsung Foundry 2nm and 3D-IC Design Enablement at SAFE Forum 2026

Samsung Foundry highlighted expanded ecosystem collaborations at the Samsung Advanced Foundry Ecosystem (SAFE) Forum 2026, delivering production-ready AI-powered digital and analog design flows, certified interface and foundation IP, multiphysics signoff solutions, and silicon-validated test capabilities for its second- and third-generation 2nm class processes as well as multi-die and 3D-IC designs using hybrid copper bonding technology.

Synopsys, Siemens, and Cadence announced expanded collaborations with Samsung Foundry at the Samsung Advanced Foundry Ecosystem (SAFE) Forum 2026. The updates cover production-ready AI-powered digital and analog EDA flows, certified interface and foundation IP, multiphysics signoff, design-for-test (DFT), and advanced packaging enablement targeted at second- and third-generation 2nm class processes as well as multi-die and 3D-IC designs using hybrid copper bonding (HCB) technology.

The announcements respond to sustained industry pressure from scaling AI infrastructure and physical AI workloads in data centers, edge devices, robotics, and autonomous systems. These workloads increase requirements for compute density, bandwidth, and energy efficiency, accelerating the shift to heterogeneous multi-die and 3D-IC architectures. At the same time, design teams face compounding engineering complexity, tighter development schedules, high...