TSMC Debuts A13 Process Technology at 2026 North America Technology Symposium

TSMC debuted its A13 process at the 2026 North America Technology Symposium in Santa Clara, California. The A13 process is a direct shrink of the A14 node announced in 2025. It provides 6% area savings from A14, with design rules fully backward compatible with A14. The technology uses nanosheet transistors and delivers increased power efficiency and performance gains through design-technology co-optimization. A13 is scheduled to enter production in 2029, one year after A14.

The announcement occurred at TSMC’s 2026 North America Technology Symposium, which kicks off the company’s global event series. The symposium theme is “Expanding AI with Leadership Silicon.” The events showcase TSMC’s technology development and manufacturing service.

Other technologies previewed at the symposium include:

 Advanced Logic   
TSMC previewed the A14 platform enhancement A12, which features Super Power Rail technology for backside power delivery in AI and HPC applications. A12 is scheduled to enter production in 2029.  
TSMC introduced N2U on its 2nm platform. N2U employs design-technology co-optimization and reaches speed gains of 3-4% or power reduction of 8-10%, along with 1.02-1.03X logic density improvement from N2P. It is positioned as a balanced option for AI, HPC, and mobile applications leveraging the process...