Credo to Spotlight OmniConnect Weaver and 224G SerDes at TSMC 2026 Technology Symposium Events
Credo said it will participate in the global TSMC 2026 Technology Symposium events, kicking off on April 22 in Santa Clara, California. Credo to spotlight the first solution in its OmniConnect family, Weaver, at the symposiums and workshops. Weaver is designed to address memory bottlenecks that limit AI inference scalability. It combines ultra-efficient 112G VSR SerDes, available in TSMC 5nm and 3nm processes, with a lightweight AXI framer. This delivers high-bandwidth, low-latency, and power-optimized connectivity between compute engines and memory whether on-die, off-substrate, or across chiplets.
Compared to conventional LPDDR5X, OmniConnect Weaver provides a 10x boost in I/O beachfront density and a 20x increase in memory density.
In addition, Credo will highlight its 224G PAM4 SerDes Intellectual Property (IP), proven in TSMC 3nm process. The technology enables 224G per lane data transmission for ultra-high speed 1.6Tbps bandwidth in next-generation AI, cloud computing, and hyperscale applications.
Credo will be present at the following TSMC 2026 Technology Symposiums and Workshops:
- April 22 – North America Technology Symposium, Santa Clara, booth #502
- May 5 – Austin Technology Workshop
- May 14 – Boston Technology Workshop
- May 14 – Taiwan Technology Symposium, Hsinchu
- May 28 – Euro...