India Semiconductor Mission 2.0 to Expand Chip Design Training to 500 Institutions

India has recorded progress towards its 10-year target of training 85,000 engineers in semiconductor design under the Chips to Startups (C2S) programme of the India Semiconductor Mission (ISM).

Union Minister for Railways, Information & Broadcasting, and Electronics & IT, Ashwini Vaishnaw, stated that the programme has covered 315 academic institutions so far, where students from Assam to Gujarat and from Kashmir to Kanyakumari are receiving training in semiconductor design, fabrication, packaging and testing.

World-class Electronic Design Automation (EDA) tools supported by Synopsys, Cadence, Siemens, Renesas, Ansys and AMD have been deployed in these 315 institutions. Students use the tools to design semiconductor chips, which are then fabricated and tested at the Semiconductor Laboratory (SCL) in Mohali. The initiative has recorded over 1.85 crore hours of EDA tool usage for chip design training.

Vaishnaw noted that the semiconductor industry is projected to grow from USD 800–900 billion to USD 2 trillion, creating demand for nearly 2 million skilled professionals globally and employment opportunities in India.

Under India Semiconductor Mission 2.0, announced in the Union Budget 2026, the C2S programme will expand from 315 to 500 academic institutions to build a continuous pool of trained talent in semiconductor design, fabricatio...