2025 Updates: UCIe 3.0, PCIe 8.0, Bluetooth 6.2, Matter 1.5, Zigbee 4.0, and Wi-Fi for Matter Standards for Chiplets, AI, IoT, and Smart Homes

In 2025, multiple standards organizations released updates to short-range on-chip, on-board, and wireless interface specifications. Here we update you on these standards for semiconductor chip designer as well as electronics system designers.

The Universal Chiplet Interconnect Express (UCIe) Consortium released UCIe 3.0 on August 5, 2025 for semiconductor chiplet interconnectivity. The specification supports 48 GT/s and 64 GT/s data rates for UCIe-S and UCIe-A, doubling bandwidth from UCIe 2.0's 32 GT/s while maintaining low power for AI and multi-chip systems. Features include runtime recalibration for power-efficient link tuning, extended sideband reach up to 100mm, continuous transmission in Raw Mode for SoC-DSP connectivity, early firmware download via Management Transport Protocol, priority sideband packets, fast throttle and emergency shutdown via open-drain I/O, and optional manageability elements. It remains fully backward compatible. The specification is available by request at www.uciexpress.org/specifications.

PCI-SIG announced PCI Express (PCIe) 8.0, targeted for member release by 2028. It doubles PCIe 7.0 data rate to 256.0 GT/s raw bit rate and up to 1 TB/s bi-directionally via x16 configuration for Artificial Intelligence/Machine Learning, high-speed networking, Edge computing, Quantum compu...