Chip Design Education Expands as Synopsys and GlobalFoundries Launch University Tapeout Program

Synopsys and GlobalFoundries (GF) announced a collaboration to launch a pilot 'chip design to tapeout' educational program for universities worldwide. The initiative, aligned with Synopsys Academic & Research Alliances (SARA) and GFLabs’ missions to advance semiconductor innovation, provides students, professors, and researchers with hands-on chip design and manufacturing experience. The program aims to lower cost barriers to custom silicon, enabling academic institutions to transform design concepts into working chips.

The pilot, launched this fall, involves 40 universities globally and utilizes the open-source 180MCU framework. Synopsys provides professional-grade electronic design automation (EDA) tools, training, and design collateral through its Synopsys Cloud platform. GF manufactures the finalized designs via its GlobalShuttle Multi-Project Wafer Program, which aggregates multiple institutional designs onto a single wafer for fabrication.

The program includes a curriculum integrating chip design and testing into academic coursework. Synopsys will train professors to lead the initial design course, followed by a second course focused on testing the fabricated chips in the subsequent semester. The initiative builds on Synopsys’ SARA program, which supp...