Andes Technology Launches D23-SE RISC-V Core for AI-Driven Automotive Safety Applications

Andes, a supplier of 32/64-bit RISC-V processor cores, announced the release of the D23-SE core, designed for functional safety in ASIL-B and ASIL-D automotive systems. Based on the D23 core, the D23-SE incorporates Dual-Core Lockstep (DCLS) and Split-Lock operation, enabling lockstep mode for critical tasks or independent operation for flexibility and performance in less safety-critical scenarios.

The 32-bit D23-SE supports RISC-V’s latest ISA extensions, reducing code size and accelerating cryptographic algorithms like AES, SM, and SHA by up to seven times. It includes enhanced Physical Memory Protection (PMP) and integrates Andes’ I/O Memory Protection Unit for hardware isolation. The core maintains a performance of 4.55 Coremark/MHz, identical to the D23, and is suited for automotive and industrial applications such as control systems, monitoring, and intelligent edge computing.

The D23-SE joins Andes’ functional safety core lineup, including the N25F-SE, D25F-SE, and D45-SE, all developed under ISO 26262 processes with a comprehensive safety package to support certification. Andes will showcase the D23-SE at the Andes RISC-V CON in Seoul on September 24, 2025, from 13:00 to 17:00 KST at EL Tower, with free registration available.