At the Intel Foundry Direct Connect 2025 event, Synopsys announced a significant expansion of its collaboration with Intel Foundry, introducing production-ready EDA flows and a comprehensive IP portfolio for Intel's advanced 18A and 18A-P process technologies. This collaboration aims to accelerate the development of high-performance, angstrom-scale chip designs, driving innovation in AI and high-performance computing applications. 
Advanced Packaging Technologies: The collaboration includes an optimized EDA reference flow for Intel's Embedded Multi-die Interconnect Bridge-T advanced packaging technology. This flow, powered by Synopsys' 3DIC Compiler, supports 2.5D/3D multi-die designs, enhancing interconnect densities and enabling efficient design creation and optimization.
Broad IP Portfolio: Synopsys offers the industry's broadest portfolio of high-performance and low-power IP for Intel 18A and Intel 18A-P. This includes interface, foundation, and Silicon Lifecycle Management IP, such as 224G Ethernet, PCIe 7.0, UCIe, USB4, embedded memories, logic libraries, IOs, and PVT sensors.
Early Design Technology Co-Optimization: Synopsys and Intel Foundry are engaging in early design technology co-optimization for Intel 14A-E, establishing readiness for the next generation of advanced nodes.
Intel Foundry Accelerator Alliances: Synopsys has joined the Intel Foundry Accelerator Design Services Alliance and the new Intel Foundry Accelerator Chiplet Alliance. These alliances aim to advance Intel Foundry adoption and innovation, providing customers with comprehensive design services and optimized EDA tools and IP.
John Koeter, Senior Vice President of the Synopsys IP Group, emphasized the significance of this collaboration: "The successful partnership between Synopsys and Intel Foundry is advancing the semiconductor industry with silicon-to-system design solutions. Our production-ready EDA flows, IP, and multi-die solutions provide our mutual customers with the technologies needed to accelerate the development of chip designs that meet or exceed their requirements."
Suk Lee, VP & GM of the Ecosystem Technology Office at Intel Foundry, added: "Our continued collaboration with Synopsys enables engineering teams to accelerate 'systems of chips' innovation utilizing our unique systems foundry capabilities and optimized Synopsys EDA flows and IP on Intel 18A and Intel 18A-P process nodes. Together, we are furthering design, manufacturing, and packaging co-optimization to meet the demands of the AI era."
For more information, visit www.synopsys.com.
