Progress in CFET hinges on success of GAA: Leap towards next semiconductor fab tech

The semiconductor industry continues its relentless pursuit of innovation, transitioning from planar transistors to advanced 3D architectures like FinFETs and Gate-All-Around (GAA) nanosheets (NSHs). Now, the spotlight is on Complementary Field-Effect Transistors (CFETs), a groundbreaking technology that vertically stacks N-type (NFET) and P-type (PFET) transistors to double transistor density and enhance power, performance, and area (PPA) efficiency. Highlighted at the 2024 IEEE International Electron Devices Meeting (IEDM), CFETs are emerging as a potential successor to GAA nano-sheets, with significant advancements driven by industry leaders like imec, TSMC, Samsung, Intel, and equipment supplier Lam Research and most importantly Litho equipment from ASML. This article delves into the latest progress in CFET development, spotlighting imec’s innovative double-row CFET architecture, the challenges ahead, and the transformative potential of this technology.

The CFET Revolution: Stacking Toward Density and Efficiency
CFETs represent a natural evolution from GAA NSHs, where the gate surrounds the channel entirely, to a fully stacked CMOS structure. By vertically integrating NFETs and PFETs, CFETs halve the footprint of traditional lateral CMOS designs, offering a substantial boost in transistor density. This is critical as Moore’s Law slo...