Complete RISC-V MCU in a FPGA from GOWIN Semiconductor

Now you can find a first complete RISC-V microcontrollers in a FPGA from GOWIN Semiconductor. AndesCore A25 RISC-V CPU IP and AE350 peripheral subsystem from Taiwan based Andes Technology is hardened and embedded in the GW5AST-138 FPGA chip from GOWIN Semiconductor. This feature provides electronics design engineers the A25 processor power and the peripherals most processors require without consuming any FPGA resources. This will help hardware team to populate the FPGA with their value-added design while the software team can concurrently create application code based on the rich RISC-V ecosystem. “Andes is committed to delivering cutting-edge RISC-V technologies allowing developers to create innovative and efficient solutions. The integration of the A25 RISC-V CPU and AE350 peripheral subsystem as a hard core in GOWIN Semiconductor’s GW5AST-138 FPGA marks a significant milestone in achieving this vision,” said Andes North America VP of Sales, Vivien Lin. “This represents a significant milestone for the RISC-V architecture as it provides our joint customers a versatile hardware development platform to create, debug, and verify their ultimate SoC design before committing their netlist for silicon fabrication. For customers not requiring an SoC, it will enable a complete RISC-V computer ready to drive their end applications.” "In the Arora V family, we incorporate the...