QuickLogic Corporation has announced an eFPGA Hard IP design win for a programmable system-on-chip (SoC) targeting battery management, precision motor control and industrial robotic applications on 16nm automotive process technology. The initial contract is valued at six figures.
QuickLogic said battery management systems are becoming more sophisticated, with demands for higher energy density, faster charging, longer operating life, enhanced safety and improved system intelligence. Application-specific motor control systems also require reduced energy consumption, extended operating life and early fault detection. As algorithms and system requirements evolve, SoC developers need hardware flexibility without sacrificing the power, performance and cost advantages of ASIC implementations.
QuickLogic's eFPGA Hard IP enables programmable hardware functionality within SoCs, allowing developers to adapt algorithms, implement new features, accelerate critical workloads and extend product lifecycles without costly silicon redesigns. The SoC will use QuickLogic's Australis eFPGA IP Generator to create a programmable logic fabric optimized for the customer's performance, power and area requirements. The fabric can support hardware acceleration, security functions, communications interfaces, advanced control algorithms and other application-specific functionality.
Andy Jaros, vice president of IP sales at QuickLogic, said developers need flexibility to evolve hardware functionality as systems become more intelligent and software-driven. He said the company's eFPGA Hard IP provides that capability while preserving the efficiency benefits of a custom SoC.
The initial contract is expected to generate license revenue over the next six months. QuickLogic anticipates royalty revenue upon production shipments.
