As AI data centers scale to support high-power GPU clusters, the industry is shifting toward 800V DC rack power architectures to improve distribution efficiency, increase power density, and support next-generation server designs. To help accelerate this transition, Navitas Semiconductor and Microchip Technology have collaborated on an 800V DC-to-6V DC reference design for AI data center rack power applications.
The platform combines Microchip's digital power control and security technology with Navitas' GaNFast gallium nitride (GaN) power devices, giving developers a practical path to implement high-efficiency power conversion aligned with the Open Compute Project's (OCP) 800V DC standard. Complete with reference hardware, software, and design documentation, the solution is intended to reduce design risk, shorten development cycles, and speed up deployment of next-generation AI infrastructure.
Joe Thomsen, corporate vice president of Microchip's digital signal controller business unit, said AI infrastructure optimization is driving one of the most significant power architecture shifts the data center industry has seen in decades. He said that as the ecosystem moves toward higher-voltage rack power systems, developers need proven building blocks that help reduce design risk and accelerate innovation, and that the collaboration with Navitas combines complementary technologies to help customers navigate this transition and bring next-generation power solutions to market faster.
At the core of the reference platform are Microchip's dsPIC33AK digital signal controllers (DSCs), its TA100 CryptoAuthentication security chip, and Navitas' GaNFast field-effect transistors (FETs). The dsPIC33AK is designed to provide high-resolution control, high-speed analog processing, and security features, including support for post-quantum cryptography, meaning encryption methods designed to remain secure even against future quantum computers. The chips offer library support for post-quantum cryptographic algorithms recommended under the Commercial National Security Algorithm (CNSA) Suite 2.0, along with hardware-accelerated cryptographic functions needed in OCP power supplies and other connected real-time control systems. Built around a 200 MHz, 32-bit processor core with a double-precision floating-point unit, the dsPIC33AK256MPS306 family combines 78-picosecond, high-resolution pulse-width modulators (PWMs) with multiple 12-bit analog-to-digital converters (ADCs) operating at up to 40 million samples per second. This high-speed core and its supporting components enable fast, precisely timed control loops needed for high-frequency, high-efficiency DC/DC power conversion.
The power delivery board (PDB) itself is powered by 16 NV6034 GaNFast FETs, rated at 650V with 17 mΩ of on-resistance, arranged in a stacked half-bridge configuration on the primary side. The transistors use a DFN8x8 dual-side-cooled package that extends GaN's performance advantages by reducing thermal resistance, allowing for higher continuous power operation while maintaining strong efficiency. The board targets up to 96% peak efficiency at full load with a 1 MHz switching frequency, achieving a power density of 2,100 W per cubic inch.
At roughly 20% thinner than a mobile phone, the board's ultra-low profile allows it to sit extremely close to the GPU board, maximizing how well the system responds to sudden changes in power demand and improving overall power distribution efficiency. Navitas frames this as a system-level approach that ensures advances in GaN technology translate into measurable improvements in efficiency, power density, transient response, and total cost of ownership. Converting directly from 800V DC to 6V DC combines what would normally be two separate conversion stages, 800V DC to 50V DC and 50V DC to 6V DC, into a single converter, delivering higher overall efficiency.
Vipin Bothra, vice president of global solution marketing at Navitas Semiconductor, said that as AI infrastructure scales to support increasingly demanding computing platforms, Navitas' GaNFast technology is a critical enabler of higher power density, greater efficiency, and improved system performance. He said combining Navitas' leadership in power semiconductors with Microchip's digital control expertise accelerates delivery of advanced power solutions tailored to the evolving requirements of next-generation AI data centers.
The reference design also incorporates Microchip's TA100 CryptoAuthentication chip to help address growing security requirements in modern power infrastructure. By building hardware-based security directly into the design, developers can establish a trusted foundation for system authentication and protection without needing to build security measures from scratch. The TA100 supports code authentication (secure boot), Message Authentication Code (MAC) generation, trusted firmware updates, multiple key management protocols including Transport Layer Security (TLS), and other operations based on a hardware root of trust.
Together, the Microchip and Navitas reference design provides a platform for developing high-voltage, high-power, compact rack power systems for AI data centers, combining power control, security, and GaN power technology to support efficient 800V-to-6V power conversion while helping developers address evolving requirements around power delivery, performance, and physical form factor. The solution will be showcased at Microchip's OCP Event, taking place October 12-15, 2026, in San Jose, California.
The design will be supported with a reference board, software, and accompanying documentation, giving developers the resources needed to evaluate and accelerate deployment of 800V DC power conversion systems for AI data center applications.
