DVCon India 2026: Agentic Plenty — AI Moves Into the Roots, Stem, Flower and Fruit of the EDA Tree

There was an invisible soul hovering over DVCon India 2026 visible in every keynote slide, every tutorial title, and every hallway conversation. That soul was agentic AI. From the three biggest names in EDA to the newest startups walking onto the stage for the first time, everyone at the Bengaluru event this September was reaching for the word "agentic" far more often than the industry's old anchor word, "EDA."

It wasn't just branding. Across three days of tutorials, keynotes, paper sessions and panels, AI showed up everywhere in the design and verification tree: not as a single tool bolted onto one stage of the flow, but as something growing through the roots (specification and RTL generation), the stem (verification and debug), the flowers (formal proofs and signoff), and now, tentatively, the fruit (physical and analog design).

Day 1: Setting the Agentic Tone

DVCon India 2026's Tutorial Day on September 1 opened with a Vision Talk from Dr. Prakash Narain, President & CEO of Real Intent, on transforming static sign-off with microarchitectural analysis — a fitting overture, since "sign-off meets AI" would become a recurring refrain. NXP's Hitesh Garg followed with a keynote on engineering at the speed of thought, framing AI-driven acceleration for next-generation chip design, while Elinnos founder Prabhu Bhairi pushed the conversation further ...