WLP method independent of incoming wafer sizes

STATS ChipPAC Ltd. has designed and implemented an innovative new manufacturing method that is a significant paradigm shift from conventional wafer level manufacturing. This breakthrough approach, known as FlexLine, delivers an unmatched level of flexibility and cost savings for wafer level packaging (WLP). With conventional WLP, an integrated circuit (IC) is fabricated, packaged and tested while still in a wafer format to streamline the manufacturing process. WLP leverages the same semiconductor equipment infrastructure as wafer fabrication which is progressively more expensive for larger wafer diameters and finer silicon (Si) geometries. The costs associated with transitioning to larger wafer diameters have resulted in extreme pricing pressures on WLP, particularly for mature technology such as wafer level chip scale packaging (WLCSP). “Growing demand for WLCSP in a range of advanced mobile products, from low-cost to high-end smartphones and tablets, is driving capacity constraints in the industry, particularly with 200mm wafers. This is causing extreme pressure on our customers to weigh the high cost of transitioning to more advanced silicon nodes against the need to achieve dramatic cost reductions for more competitive end products,” said Chong Khin Mien, Senior Vice President of Product and Technology Marketing, STATS ChipPAC. “Capacity and cost challenges for WLCS...