Date: 12/07/2012

Mentor Graphics Nucleus RTOS in MIPS32 34K rise performance by 20%

Mentor Graphics has announced the Nucleus product integration and SMP (symmetric multiprocessing) feature in its Nucleus RToS supports MIPS32 34K core that utilizes MIPS Technologies’ MT (hardware Multi-Threading) technology. SMP support in the Nucleus RTOS is exploited by using two hardware threads, or Virtual Processing Elements (VPEs) of MIPS32. The performance increase of more than 20% was demonstrated using EEMBC CoreMark.

Mentor claims Nucleus product is the industry’s first RTOS to demonstrate significant performance gains using MIPS Technologies’ Virtual Processing Engines (VPEs) over a single-core approach.

The Nucleus RTOS provided the software framework for symmetric multiprocessing (SMP) that includes load balancing, task and interrupt affinity, conditional bound computation, and full support for the multiple hardware threads on the same CPU core.

“We are pleased that Mentor recognizes the advantages of multi-threading, and is supporting our multi-threading technology with its Nucleus RTOS which has widespread adoption in mobile, networking and a variety of embedded applications. Nucleus VSMP for the 34K core can enable developers to achieve significant performance efficiency benefits,” said Gideon Intrater, vice president of marketing, MIPS Technologies.

“Mentor’s Nucleus RTOS continues to be one of the most highly deployed in the industry due to its reliability, efficiency and power management capabilities,” said Andrew Caples, Nucleus product line director, Mentor Graphics Embedded Software Division. “Together with MIPS’ 34K core, Nucleus provides embedded developers with system performance gains at a much lower cost.”
Author: Srinivasa Reddy N