Cadence announced the Cadence Tensilica NeuroEdge 130 AI Co-Processor, a processor designed to complement any neural processing unit and enable end-to-end execution of the latest agentic and physical AI networks on advanced automotive, consumer, industrial, and mobile SoCs. This new class of processor, based on the proven architecture of the Tensilica Vision DSP family, delivers over 30% area savings and more than 20% reduction in dynamic power and energy without compromising performance.
“With the rapid proliferation of AI processing in physical AI applications such as autonomous vehicles, robotics, drones, industrial automation, and healthcare, NPUs are assuming a more critical role,” said Karl Freund, founder and principal analyst of Cambrian AI Research. “Today, NPUs handle the bulk of the computationally intensive AI/ML workloads, but a large number of non-MAC layers include pre- and post-processing tasks that are better offloaded to specialized processors. However, current CPU, GPU, and DSP solutions involve tradeoffs, and the industry needs a low-power, high-performance solution that is optimized for co-processing and allows future proofing for rapidly evolving AI processing needs.”
The Tensilica NeuroEdge 130 AICP features an extensible design that ensures seamless compatibility with in-house NPUs, Cadence Neo NPUs, and third-party NPU IP. It performs offloaded tasks with high performance and efficiency, taking the inherent power, performance, and area advantages of Tensilica DSPs to new levels. Key benefits include:
VLIW-based SIMD architecture with configurable options for high performance and low power consumptionControl processor capabilities to issue instructions and commands to the NPU
Optimized ISA and instructions for non-NPU optimal tasks such as ReLU, sigmoid, tanh, and more
Programmability, flexibility, and future-readiness for end-to-end execution of unseen and future AI workloads
“Cadence has proven AI co-processor use cases with our Tensilica DSPs. With AI workloads transforming and becoming less domain-specific, our AI SoC and systems customers have been seeking a small and efficient AI-focused co-processor for better PPA and future-proofing,” said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. “Continuing our track record of IP innovations, we’ve introduced a purpose-built new class of processor. Designed as an NPU companion, the Tensilica NeuroEdge 130 AICP raises the bar for performance efficiency to address our customers’ most demanding AI applications.”
The Tensilica NeuroEdge 130 AICP is supported by the Cadence NeuroWeave™ Software Development Kit (SDK), which leverages the Tensor Virtual Machine (TVM) stack for easy use and allows architects to tune, optimize, and deploy their AI models for Cadence’s AI IP. The processor also comes equipped with a lightweight standalone AI library, enabling customers to directly program AI layers and bypass potential overheads of some compiler frameworks.
learn more at www.cadence.com.
