Lattice packs more flash and hard IP and secures its new MachXO5T-NX FPGA

The new FPGA from Lattice looks to outperform competing FPGAs from other vendors in the same category, as per company's claims in the product release. The new FPGA chip from Lattice, this author talking about in this article is Lattice MachXO5T-NX. Lattice able to integrate more memory and some hardened IP. To provide better system reliability and to support safety critical applications, Lattice MachXO5T-NX is designed to deliver 100x lesser soft error rate compared to competing FPGAs of same category. Lattice MachXO5T-NX embeds 57Mb user Flash memory, a lot more than similar-class competing FPGAs. Even the on-chip embedded memory is claimed to be 3.4 times more than competing FPGAs. Lattice MachXO5T-NX integrates hardened PCI express gen2 interfaces between the host processor and the control FPGA. Lattice MachXO5T-NX offers up to 291 general purpose I/Os supporting early I/O configuration and features such as 1.25 Gbps SGMII, default pull-down, hot socketing, and programmable slew rate enabling simple printed circuit board design. The new security features in MachXO5T-NX includes On-chip multi-boot with bitstream encryption (AES256) and authentication (ECC256). Suggested applications for Lattice MachXO5T-NX includes enterprise networking, machine vision, and industrial IoT. “As the pace of technological innovation accelerates and system management design...