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EnSilica teams with BaySand to provide ASIC UltraShuttle-65 MPW

EnSilica has teamed with BaySand to provide customers of BaySand’s newly launched ASIC UltraShuttle-65 multi-project wafer (MPW) customers with a range of IP solutions that can be configured to their specific application requirements. The IPs will comprise EnSilica’s eSi-RISC processor cores, eSi-Connect processor peripherals, eSi-Crypto encryption and eSi-Comms communications IP solutions as well hardware accelerators. EnSilica’s automated flow allows complex CPU sub-systems to be delivered to customers in a matter of days. This sub-system can include single or multiple eSi-RISC processor cores with JTAG debug, and a range of peripherals and timers as well as encryption accelerator cores to enable secure boot and communication. The system is built around standard multi-layer AMBA AHB bus fabric generated as part of the automated flow. Additional APB, AHB, AXI buses can be included to allow the easy integration of the customer’s own IP cores. This design flow allows EnSilica processor sub-systems to be delivered to customers well ahead of the first ASIC UltraShuttle-65 MPW run in October 2016. “We are extremely pleased to be an active and integral partner to BaySand in its new ASIC UltraShuttle-65 MPW program,” said Ian Lankshear, CEO of EnSilica. “By supporting multiple projects customizable by four metal layers and facilitating access to deep sub-micron silicon by offe...
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