JEDEC Publishes Revision of International Standard for JESD30G

JEDEC Solid State Technology Association published newly revised standard that establishes requirements for the next generation of semiconductor device package components: JESD30G. Developed by JEDEC’s JC-11 Committee for Mechanical Standardization, the standard is based on a language used to describe the geometric aspect of the components used for semiconductor package development. JESD30G is available for free download from the JEDEC website. The semiconductor device package language defines the component around the three pillars of package, lead form and lead position, providing a clear description of the component geometry. This standard provides the opportunity to encourage the industry to unify towards a single defining structure for components by adhering to a comprehensive, robust definition based on geometric data. This approach defines a majority of the components in the market, including scalability to support emerging and future semiconductor packages. This methodology defines the components in detail to enable process efficiencies throughout the product development process – from design, purchasing, manufacturing, test, and the entire product lifecycle. Additional definitions and clarifications of the device to support the industry will also be available in this requirements release. John Kelly, JEDEC President, said, “These clearly defined requirements wi...