IP for post-silicon system validation in SoC design

Sonics has introduced Sonics Performance Monitor and Hardware Trace (SonicsMT) silicon IP for post-silicon system validation and software development processes for complex systems-on-chip (SoC). “Today’s SoCs contain multiple programmable processors and cores that generate a huge volume of transactions,” said Ray Brinks, senior vice president of operations at Sonics. “On-chip performance analysis and troubleshooting techniques are now a must-have requirement for our customers and prospects using NoCs and shared memory in their designs. Complexity of communication between the cores makes real-time, at-speed debugging a necessity in order to find and fix problems with their operation and software interaction. SonicsMT provides SoC designers and software engineers the capability to visualize internal performance behaviors and tune system and software performance with pinpoint accuracy in a non-intrusive manner.” Sonics says its SonicsMT is automatically embedded inside the on-chip interconnect and leverages existing NoC infrastructure to minimize gate count while achieving real-time, at speed (within one clock cycle of the event) monitoring and tracing of the critical performance metrics. It facilitates analysis and debug strategies for: Chip Architecture Exploration – performance and mode interactions, power usage, memory utilization, traffic congestion for the current de...