New MEMS design software creates Verilog-A ROM models faster

Design speed is an important trend today in semiconductor chip design. New versions of most of the EDA software tools offering 10x or even more cut in processing time. Virtual IC and MEMS design software vendor Coventor has announced its MEMS+ 4.0 software suite which allows designs in parallel in the MathWorks MATLAB and Cadence Virtuoso environments. The MEMS+ 4.0 release is capable of exporting models in Verilog-A format and a full 64-bit implementation that allows more accurate modeling of complex MEMS sensors and actuators. The MEMS+ 4.0 suite helps in designing and verifying precision accelerometers, gyroscopes, microphones and many other types of MEMS. This latest release of the MEMS+ suite extends the scope of the platform by providing a ‘tunable’ accuracy-versus-speed approach for co-designing MEMS and integrated circuits (ICs) and compatibility with more EDA analog/mixed-signal simulation environments. Using MEMS+ 4.0, MEMS designers can automatically generate and export Reduced Order Models (ROMs) in Verilog-A format for use by VLSI IC designers. These exported models simulate 100X faster than fully non-linear MEMS+ models and are compatible with all commercial analog/mixed-signal circuit simulators that support the industry-standard Verilog-A hardware description language, claims Coventor. Coventor explain: During model generation, designers can select o...