New timing closure tool from Synopsys speed up design while plugging the leakage

Synopsys has announced a new configuration of its static timing analysis and signoff product PrimeTime ADV, which includes advanced leakage recovery and will incorporate physical-aware signoff-driven engineering change order (ECO) guidance technology. This tool work in conjunction with the latest Synopsys' IC Compiler solution. PrimeTime ADV addresses the complex timing closure need of VLSI design for FD-SOI and 3-D chip fabrication technologies, which need more ECO iterations. "Strong ECO support with tight links between signoff timing and place and route technologies has emerged as a key requirement for our next-generation 28 nm FDSOI designs to achieve timing closure on schedule," said Indavong Vongsavady, director, Central CAD & Design Solutions at STMicroelectronics Technology R&D. "PrimeTime ECO's scalability, with its lightweight infrastructure and its aggressive leakage recovery algorithms, tightly coupled with IC Compiler's versatility to implement the ECO guidance, is the optimal approach for advanced timing closure." Synopsys explains: With knowledge of the physical environment gained in PrimeTime, improved ECO choices can be made and physical-aware ECO guidance will be provided to the place and route tool. IC Compiler uses enhanced guidance to make more informed placement and routing decisions, and to minimize the physical impact of the ECO, which result...