10th Annual Linley Processor Conf to highlight processor market dynamics

Date: 22/09/2016
10th Annual Linley Processor Conference to highlight the dynamic change market scenario upsetting processors. The two-day event to take place on 27th and 28th of September 2016 at the Hyatt Regency Hotel in Santa Clara, California, U.S. The programme is set to feature 22 technical presentations where subjects such as processors for neural networks, vision processors, networking processors, server processors, high-speed memory, SoC interconnects, and processors for IoT gateways, IoT clients, and advanced automotive designs to be discussed.

Linley Gwennap, principal analyst and conference chairperson says, “Processors are becoming increasingly specialized to meet the needs of both high-volume and emerging applications, including embedded, networking, and IoT designs“. “The Linley Processor Conference gathers leading processor vendors to deliver vetted presentations about their newest solutions. This year’s conference features eight new product announcements, including a new processor architecture for deep learning. These technical talks, plus two keynotes and a special panel session on enabling self-driving cars, give attendees the critical information they need to select the best processor technology for their designs.”
List of companies taking part in the event where they would exhibit their products and technologies are mentioned below:

Wave Computing – This presentation will introduce the details of the company's first Dataflow Processing Unit (DPU) architecture. Wave is the world’s first company to disclose a processor-chip architecture designed from scratch to accelerate deep learning.

NetSpeed Systems - This presentation introduces a new end-to-end coherency solution for high performance heterogenous SoC designs that supports CHI and ACE in a single design and uses advanced machine-learning algorithms to create a pre-verified cache-coherent interconnect.

Mellanox will debut its Innova Secure network adapter solution that offloads and accelerates security protocols and advanced network functions, enabling the ubiquitous use of encryption across the data center with the highest network throughput and superior server utilization.

CEVA - This presentation will introduce the latest CEVA vision processor and demonstrate how its neural-network software framework and unique “push button” network converter converts pre-trained networks to real-time optimized networks for embedded devices, significantly reducing time-to-market.

Cadence – This talk will include details on some of the new products and features of the upcoming Cadence Tensilica announcement.
ARM - This talk will introduce ARM's next-generation coherent backplane IP that enables SoC architects to address these challenges using heterogeneous solutions that blend compute and acceleration.

Andes Technology - This presentation will introduce various grades of new embedded microprocessor cores, peripherals, and a bus fabric to support IoT SoC designs. Features, performance, benchmarks of new Andes IP cores will be presented.

Adesto Technologies - The presentation will discuss a new approach for XiP design, how it impacts the CPU's memory hierarchy and the non-volatile memory (NVM) device, compare it to traditional solutions and show how it contributes to an improved system design.

Presenting, panelist, and exhibiting companies include NXP, Synopsys, MediaTek, Cavium, InsideSecure, Cadence, CEVA, MoSys, IBM, NetSpeed Systems, Arteris, RISC-V, Mellanox, ARM, Wave Computing, Micron, Andes Technology, AppliedMicro, Adesto Technologies, EEMBC, RapidIO, Vmware, and Quanergy Systems.

Author: Srinivasa Reddy N
Header ad