ST, ARM and Cadence contribute to system C specs of Accellera

STMicroelectronics, ARM and Cadence Design Systems have announced three new contributions to the SystemC Language Working Group of the Accellera Systems Initiative, which are going to increase model and tool interoperability for electronic system-level (ESL) design at the transaction-level. The joint work includes new interfaces for interrupt modeling, which allow seamless integration of models from different companies; application programming interfaces for register introspection that enable tool interoperability to seamlessly display and update register values; and new approaches for memory-map modeling that improve users’ productivity during debugging of virtual platforms for hardware/software multicore systems. The contributions consist of fully working application programming interfaces (API) and implementations, as well as documentation and examples, released under an Apache 2.0 open-source license and available online at http://forums.accellera.org/files/. “These new interfaces are crucial to strengthening the ESL ecosystem. As a step towards interoperability driven by ST, ARM and Cadence, these proposed standards dramatically reduce risks and efforts associated with the integration of virtual prototypes. Eliminating the need for adapters will increase virtual prototype simulation performances, enable sooner and faster hardware-software integration, and therefore i...