JEDEC releases JEP30 Part Model guidelines to enable chiplet integration

Microelectronics standards body JEDEC published new release of the JEP30 PartModel Guidelines, including reference documents and related XML Schema files. JEP30 and its supporting documents and resources are available for free download from the JEDEC website. A groundbreaking collaboration between the Open Compute Project Foundation (OCP) and JEDEC to enhance JEP30 is combining the capabilities and open standards of OCP’s Chiplet Data Extensible Markup Language (CDXML) into the JEDEC’s JEP30 PartModel Guidelines. This integration expands the capability of the PartModel to enable chiplet builders to also provide standardized chiplet part descriptions to their customers electronically. This advancement opens the door to automating System in Package (SiP) design and assembly using chiplets. The chiplet descriptions encompass crucial information for SiP builders, including thermal properties, physical and mechanical requirements, behavior specifications, power and signal integrity properties, testing in-package and security parameters. JEDEC and OCP extended their collaboration with this latest release by enabling the PartModel to represent Die-Arrays, scalable to support multiple depths of hierarchical nested arrays and billions of bumps intended to support the industry for decades to come. “The evolution of JEP30 represents a paradigm shift in facilitating electronic prod...