Intel foundry to challenge TSMC and Samsung domination with range of innovations

Date: 20/03/2024
Intel Foundry finally takes-off for a giga-range of wafer production in terms of scale and provides roadmaps to make up to 14A (1.4 nm) chips covering growing markets such as AI server market.

Intel also confirmed that they are on schedule with their ambitious plan to introduce five new manufacturing nodes within four years, known as the five-nodes-in-four-years (5N4Y) process roadmap. This plan includes the industry's first backside power solution. The company's leaders anticipate that Intel will regain its position as a leader in semiconductor manufacturing with the release of the Intel 18A node in 2025.

Intel Foundry

Pic: Intel foundry process roadmap (Source: Intel)

The updated roadmap also outlines advancements in Intel 3, Intel 18A, and Intel 14A process technologies. One notable addition is Intel 3-T, which has been optimized for 3D advanced packaging designs using through-silicon vias (TSVs) and is nearing readiness for manufacturing. Additionally, the roadmap includes the introduction of new 12 nanometer nodes resulting from a recent collaboration with UMC, announced just last month.

It has showcased some key groundbreaking advancements in semiconductor manufacturing such as backside plane power, glass subsrate and advances in 3D and 2.5 D packaging. More important is it is pitting itself as an advanced alternative to TSMC and Samsung, with none of it's advanced angstrom scale fabs in Asia.

Intel Foundry

Pic: Intel employee holds a test chip built on a glass substrate (Source: Intel)

Intel is employing a new interconnect layer tech called EMIB, Foveros, and Foveros Direct for advanced packaging. It also introduced Intel Foundry FCBGA 2D+.
Intel Foundry

Pic: Intel employee holds a semiconductor wafer with 3D stacked Foveros tech. (Source: Intel)

The latest EUV lithography semiconductor equipment is pivotal in Intel's advanced nodes. After ten years of research and development, ASML delivered the inaugural modules of the High NA EUV lithography system to Intel in December 2023. The TWINSCAN EXE:5000, also known as EXE, signifies a significant leap in cutting-edge chip manufacturing.

TWINSCAN EXE:5000 offers chipmakers a critical capability: a critical dimension (CD) of 8 nm. This advancement allows manufacturers to print transistors 1.7 times smaller than previous NXE systems, resulting in a remarkable increase in transistor densities, nearly 2.9 times higher than before. This enhancement propels Intel forward in its pursuit of next-generation semiconductor technologies.

Software, IP, SoC semiconductor design service plays equally important role:

Intel partners with fabless eco partners such as Arm, Synopsys, Cadence, and Siemens for the tools, IP and EDA software.

Synopsys, Cadence, and Siemens: These EDA partners collaborate with Intel to develop customized Ips and optimized design flows for Intel's advanced process nodes. Synopsys focuses on delivering key IP on Intel 3 and Intel 18A, while Cadence expands its portfolio for Intel 18A technology. Siemens contributes to the development of a comprehensive workflow for Intel Foundry's EMIB approach, enabling high-density interconnect of heterogeneous chips.

Intel is partnering with Arm to offer advanced foundry services supporting Arm-based mobile system-on-chips (SoCs) and allows for potential design expansion into automotive, Internet of Things (IoT), data center, aerospace and government applications. This collaboration marks a significant opportunity for both Arm and Intel to assist startups in developing cutting-edge Arm-based technologies. The partnership includes providing essential intellectual property (IP), manufacturing support, and financial assistance to encourage innovation and facilitate growth in this sector.

Intel Foundry Services (IFS) and Arm are working together on design technology co-optimization (DTCO), a collaborative effort to enhance power, performance, area, and cost (PPAC) for Arm cores specifically tailored for Intel 18A process technology. Together, IFS and Arm will develop a mobile reference design, showcasing the integration of software and system knowledge for foundry customers. As the industry progresses towards system technology co-optimization (STCO), the partnership will evolve to optimize platforms holistically, spanning applications, software, package, and silicon, a kind of full-stack optimization. By using Intel's open system foundry model, Arm and IFS aim to drive innovation and maximize performance across the entire system architecture.

As a key design services and alliance partner, India based Wipro accelerates chip design innovation in collaboration with Intel Foundry. Their partnership addresses the rising demand for AI chip manufacturing, empowering clients across industries to leverage advanced process nodes for ongoing innovation.

The market insights provided by TrendForce underscore the significance of Intel Foundry's technological advancements and strategic partnerships. As Taiwan concentrates 60% of advanced manufacturing processes by 2027, Intel's collaboration with global partners strengthens its position in the competitive landscape. Furthermore, China's rapid expansion in mature process capacities drive Intel's cutting-edge technologies in maintaining market leadership and driving innovation globally as trusted chipmaker for US customers.

Intel is also leveraging its older, mature 12 nm node facilities. Intel is partnering with UMC to facilitate seamless migration for UMC customers to 12nm node while leveraging the added resilience of a western footprint. The 12 nm node will harness Intel's high-volume manufacturing capacity based in the United States. Manufacturing of the new process node will take place at Intel's Fabs 12, 22, and 32, situated in the Ocotillo Technology Fabrication site in Arizona. By utilizing existing equipment in these fabs, UMC anticipate a significant reduction in upfront investment requirements, leading to optimized utilization of resources.