CXL Consortium released CXL 3.1 specs
Date: 04/12/2023
CXL Consortium released the Compute Express Link (CXL) 3.1 specification with improved fabric manageability to take CXL beyond the rack and enable disaggregated systems.
The CXL 3.1 Specification improved to support optimization of resource utilization, creation of trusted compute environments as needed, extend memory sharing and pooling to avoid stranded memory, and facilitating memory sharing between accelerators.
“The CXL 3.1 specification incorporates new features requested by the CXL community to create disaggregated systems and keep up with high-performance computational workloads,” said Larrie Carr, CXL Consortium President. “With the support of our members, we continue to develop and promote CXL technology to enable an interoperable ecosystem of heterogeneous memory and computing solutions.”
Highlights of the CXL 3.1 specification feature
CXL Fabric improvements and extensions
Fabric Decode/Routing requirements
Fabric Manager API definition for PBR (Port Based Routing) Switch
Host-to-host communication with Global Integrated Memory (GIM) concept
Direct P2P CXL.mem support through PBR Switches
Trusted-Execution-Environment Security Protocol (TSP)
Memory Expander Improvements
Extended Meta Data with support for up to 32-bits per cache line of host specific state
Improved visibility into CXL memory device errors
Expanded visibility and control over CXL memory device RAS (Reliability, Availability, Serviceability)
Full backward compatibility with CXL 2.0, CXL 1.1, and CXL 1.0
“As an active contributor to the CXL Consortium and a leader in CXL connectivity solutions for cloud and AI infrastructure, we are excited about the CXL 3.1 specification’s new fabric, security, and memory
expansion improvements. We look forward to enhancing our Leo Smart Memory Controllers with these new features to support additional CXL use cases and continue to meet the demands of memory- intensive workloads at cloud-scale.” said Ahmad Danesh, Associate Vice President, Product Management, Astera Labs
“Dell Technologies has been a strong supporter of CXL technologies since the CXL Consortium was formed, and we believe the capabilities enabled by the CXL 3.1 Specification will further grow the CXL
ecosystem. We are actively engaged at the CXL board of directors, technical task force, and work group levels to ensure CXL standards are beneficial to the industry and our customers. Dell also is leading
efforts with other industry standards groups to ensure CXL memory module and management standards are available. We see great value to the industry as technology approaches consolidate and CXL is
embraced as the industry standard for memory expansion and cache coherent accelerators.” comments Stuart Berke, Fellow & VP, Dell Technologies Hewlett Packard Enterprise (HPE)
“We’re excited for the release of the CXL 3.1 specification, which introduces routing and communication enhancements within switched fabric-attached memory and accelerator configurations, enabling future disaggregated system architectures. As enterprise, high performance computing, and artificial intelligence workflows evolve and grow to be more data-intensive, it will be important to evaluate the scalability of memory-centric computing solutions with fabric-attached resources on performance, use cases and effectiveness in securing and maintaining access to that data. Extensions included in the CXL 3.1 specification enable a standards-driven approach to incorporate these solution attributes as next- generation technologies are deployed. HPE values the opportunity to contribute to another noteworthy CXL Consortium milestone.” quoted Andrew Wheeler, HPE Fellow, Vice President and Director, Hewlett Packard Labs
“Lenovo is an active member of the CXL Consortium and we are committed to developing this important standard while helping build the ecosystem around the new CXL interconnect. We are excited to be part of developing solutions that enable a new era of data center performance and efficiency, working with the consortium to identify specifications that foster the growth and adoption of innovative CXL products into future Lenovo systems.” says Greg Huff, Chief Technology Officer, Lenovo Infrastructure Solutions Group
To download specs visit:
https://www.computeexpresslink.org/download-the-specification
Source: CXL Consortium
